ALTR » Topics » Intellectual Property Cores

This excerpt taken from the ALTR 10-K filed Mar 14, 2006.

Intellectual Property Cores

 

IP cores are pre-verified building blocks that implement standard system-level functions that customers incorporate in their PLD design by using our proprietary development software. Soft IP cores available for use in our devices consist of our Nios® and Nios II soft core embedded processors and our portfolio of MegaCore® functions, which we license to our customers, and our Altera Megafunction Partners Program, or AMPPSM, cores, which are pre-verified by us and licensed to our customers by third parties.

 

The Nios and Nios II embedded processors utilize a reduced instruction set computing, or RISC, architecture and are a cost-competitive and flexible alternative to discrete microcontroller solutions. The Nios embedded processors can be efficiently implemented in all of our newer FPGA devices. The Nios II soft core embedded processor provides up to a 300% improvement in price/performance when compared to the original Nios embedded processor and competes favorably with many discrete microcontrollers.

 

With IP cores, system designers can focus more time and energy on improving and differentiating the unique aspects of their system design, rather than spending time designing common off-the-shelf functions. IP cores are essential to providing our customers solutions that enable higher levels of integration and faster time-to-market. Today, we offer a broad range of soft IP cores for various system blocks for DSP algorithms, bus interfaces, memory controllers, telecommunications, data communications, microprocessors, and peripherals. Prior to licensing a soft IP core, customers may download an encrypted soft IP core from our web-site and verify that it works in their own system design. While licensing soft IP cores represents a small portion of our total revenues, we believe a broad product offering in this area is necessary to compete with ASIC and ASSP suppliers as well as other PLD suppliers.

 

This excerpt taken from the ALTR 10-K filed Mar 11, 2005.

Intellectual Property Cores

 

IP cores are pre-verified building blocks that implement standard system-level functions that customers incorporate in their PLD design by using our proprietary development software. Soft IP cores available for use in our devices consist

 

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of our Nios® and Nios II soft core embedded processors and our portfolio of MegaCore® functions, which we license to our customers, and our Altera Megafunction Partners Program, or AMPPSM, cores, which are licensed to our customers by third parties.

 

The Nios and Nios II embedded processors utilize a reduced instruction set computing, or RISC, architecture and is a cost-competitive and flexible alternative to discrete microcontroller solutions. The Nios embedded processors can be efficiently implemented in all of our newer FPGA devices. The Nios II soft core embedded processor provides up to a 300% improvement in price/performance when compared to the original Nios embedded processor and competes favorably with many discrete microcontrollers.

 

With IP cores, system designers can focus more time and energy on improving and differentiating the unique aspects of their system design, rather than spending time designing common off-the-shelf functions. IP cores are essential to providing our customers solutions that enable higher levels of integration and faster time to market. Today, we offer a broad range of soft IP cores for various system blocks for DSP algorithms, bus interfaces, memory controllers, telecommunications, data communications, microprocessors, and peripherals. Prior to licensing a soft IP core, customers may download an encrypted soft IP core from our web site and verify that it works in their own system design. While licensing soft IP cores represents a small portion of our total revenues, we believe a broad product offering in this area is necessary to compete with ASIC and ASSP suppliers as well as other PLD suppliers.

 

EXCERPTS ON THIS PAGE:

10-K
Mar 14, 2006
10-K
Mar 11, 2005
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