Linear Technology (LLTC)

Our manufacturing operations may be interrupted or suffer yield problems.

We rely on our internal manufacturing facilities located in California and Washington to fabricate most of our wafers, although we depend on outside silicon foundries for a small portion (less than 5%) of our wafer fabrication. We could be adversely affected in the event of a major earthquake, which could cause temporary loss of capacity, loss of raw materials, and damage to manufacturing equipment. Additionally, we rely on our internal and external assembly and testing facilities located in Singapore and Malaysia. We are subject to economic and political risks inherent to international operations, including changes in local governmental policies, currency fluctuations, transportation delays and the imposition of export controls or increased import tariffs. We could be adversely affected if any such changes are applicable to our foreign operations.

Our manufacturing yields are a function of product design and process technology, both of which are developed by us. The manufacture and design of integrated circuits is highly complex. We may experience manufacturing problems in achieving acceptable yields or experience product delivery delays in the future as a result of, among other things, capacity constraints, construction delays, upgrading or expanding existing facilities or changing our process technologies, any of which could result in a loss of future revenues or increases in fixed costs. To the extent we do not achieve acceptable manufacturing yields or there are delays in wafer fabrication, our results of operations could be adversely affected. In addition, operating expenses related to increases in production capacity may adversely affect our operating results if revenues do not increase proportionately.