This excerpt taken from the SNPS 10-K filed Jan 12, 2006.
Our Verification Group is responsible for our Discovery Verification platform, which combines our simulation and verification products and design-for-verification methodologies, and provides a consistent control environment to help significantly improve the speed, breadth and accuracy of our customers verification efforts.
The following are the Discovery Verification platforms principal products and solutions:
· VCS® comprehensive RTL verification solution, which includes technologies that support model development, testbench creation, coverage feedback and debugging techniques.
· Vera® testbench generator, which automates the creation of testbenches, custom models that provide simulation inputs and respond to simulated outputs from the design during verification. Automating this process significantly improves verification quality.
· NanoSim® FastSPICE circuit simulation product for analog, mixed signal and digital IC verification, which offers high performance and capacity for pre-and-post-layout full-chip circuit simulation, timing and power analysis.
· HSIM® hierarchical FastSPICE circuit simulation product for analog, mixed-signal and digital IC verification, which offers pre and post-layout full-chip circuit simulation and memory verification.
· HSPICE® circuit simulator, which offers high-accuracy, transistor-level circuit simulation, thereby enabling designers to better predict the timing, power consumption, functionality and analog performance of their designs.
· Verification IP reusable IP designed to test specific functions and adherence to industry protocols in an IC design, which we believe is becoming increasingly important to more quickly achieving verification sign-off.
· Discovery AMS mixed-signal verification solution which is based on the VCS, NanoSim and HSPICE simulators.
The Verification Group also develops and markets tools that perform system level design, design rule checking and hybrid formal verification, specialized functions that designers often require during verification.
This excerpt taken from the SNPS 10-K filed Jan 12, 2005.
Discovery Verification Platform. Our Discovery Verification Platform includes our verification and simulation products. The increasing size and complexity of today's ICs and SoCs have vastly increased the time and effort required to verify chip designs, with verification estimated to consume 60% to 70% of total design time. As a result, reducing verification "risk" (i.e. minimizing the possibility of finding design "bugs" when the ICs are delivered from the foundry) has become increasingly important to customers. To manage and reduce this verification risk, our Discovery platform combines our simulation and verification products and design-for-verification methodologies, and provides a consistent control environment to significantly improve the speed, breadth and accuracy of our customers' verification efforts.
Our Discovery Verification Platform includes the following principal products:
In fiscal 2004, we delivered the Discovery AMS solution, a subset of our verification technologies optimized to perform verification on analog and mixed signal designs.